Showing posts with label avr. Show all posts
Showing posts with label avr. Show all posts

Tuesday, November 18, 2014

Choose PIC or AVR ATMEGA

Choose
Microcontroller more and more, to choose to use the PIC 16F microcontroller or AVR family ATMEGA 8535 just need googling that here. System works sama2 work on both the base 8-bit PIC or AVR ATMEGA. PIC or AVR basically the same microcontroller that has an analog input facilities in accordance with what I need. Feature owned by PIC and AVR ATMEGA too much alike. From the PIC feature on the analog input also has AVR ATMEGA. Feature ADC also owned by PIC or AVR ATMEGA even between PIC and AVR ATMEGA is sama2 have ADC with many channels all (plus mantab all). From the feature control PWM PIC and AVR ATMEGA also have. Well bener2 added mantab world with the presence of PIC microcontroller or AVR ATMEGA this, first MCS51 family still AT89C5x or AT89S5x wrote that in use. After dipikir2 should also be detailed feature between PIC and AVR ATMEGA with details.

PIC family Featured PIC16F87X
High performance RISC CPU
Only 35 single word instructions to learn
All single cycle instructions except for program branches the which are two cycle
Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle
Up to 8K x 14 words of FLASH Program Memory,
Up to 368 x 8 bytes of Data Memory (RAM)
Up to 256 x 8 bytes of EEPROM Data Memory
Pinout compatible to the PIC16C73B/74B/76/77
Interrupt capability (up to 14 sources)
Eight level deep hardware stack
Direct, indirect and relative addressing modes
Power-on Reset (POR)
Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation
Programmable code protection
Power saving SLEEP mode
Selectable oscillator options
Low power, high speed CMOS FLASH / EEPROM technology
Fully static design
In-Circuit Serial Programming  (ICSP) via two pins
Single 5V In-Circuit Serial Programming capability
In-Circuit Debugging via two pins
Processor read / write access to program memory
Wide operating voltage range: 2.0V to 5.5V
High Sink / Source Current: 25 mA
Commercial, Industrial and Extended temperature ranges
Low-power consumption:
- <0.6 ma typical @ 3v, 4 mhz
- 20 μA typical @ 3V, 32 kHz
- <1 μa typical standby current

Pin Diagram
Peripheral Features:

Timer0: 8-bit timer / counter with 8-bit prescaler
Timer1: 16-bit timer / counter with prescaler, can be incremented During SLEEP via external crystal / clock
Timer2: 8-bit timer / counter with 8-bit period register, prescaler and postscaler
Two Capture, Compare, PWM modules
- Capture is 16-bit, max. resolution is 12.5 ns
- Compare is 16-bit, max. resolution is 200 ns
- PWM max. resolution is 10-bit

10-bit multi-channel Analog-to-Digital converter
Synchronous Serial Port (SSP) with SPI (Master mode) and I2C (Master / Slave)
Universal Synchronous Asynchronous Receiver
Transmitter (USART / SCI) with 9-bit address detection
Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS controls (40/44-pin only)
Brown-out detection circuitry for Brown-out Reset (BOR)
Featured AVR ATMEGA 8535
High-performance, Low-power AVR ® 8-bit Microcontroller
Advanced RISC Architecture
- 130 Powerful Instructions - Most Single Clock Cycle Execution
- 32 x 8 General Purpose Working Registers
- Fully Static Operation
- Up to 16 MIPS throughput at 16 MHz
- On-chip 2-cycle Multiplier

Nonvolatile Program and Data Memories
- 8K Bytes of In-System Self-Programmable Flash Endurance: 10,000 Write / Erase Cycles
- Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program
True Read-While-Write Operation
- 512 Bytes EEPROM Endurance: 100,000 Write / Erase Cycles
- 512 Bytes Internal SRAM
- Programming Lock for Software Security

Peripheral Features
- Two 8-bit Timer / Counters with Separate Prescalers and Compare Modes
- One 16-bit Timer / Counter with Separate prescaler, Compare Mode, and Capture Mode
- Real Time Counter with Separate Oscillator
- Four PWM Channels
- 8-channel, 10-bit ADC
8 Single-ended Channels
7 Differential Channels for TQFP Package Only
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x for TQFP Package Only
- Byte-oriented Two-wire Serial Interface
- Programmable Serial USART
- Master / Slave SPI Serial Interface
- Programmable Watchdog Timer with Separate On-chip Oscillator
- On-chip Analog Comparator

Special Microcontroller Features
- Power-on Reset and Programmable Brown-out Detection
- Internal calibrated RC Oscillator
- External and Internal Interrupt Sources
- Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby

I / O and Packages
- 32 Programmable I / O Lines
- 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN / MLF

Operating Voltages
- 2.7 - 5.5V for ATmega8535L
- 4.5 - 5.5V for ATmega8535

Speed ​​Grades
- 0 - 8 MHz for ATmega8535L
- 0-16 MHz for ATmega8535
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Sunday, August 31, 2014

AVR Dongle Wiring diagram Schematic

This schema is intended to program AVR controllers such as the AT90S1200 via the parallel port. The schema is extremely simple. IC1 provides buffering for the signals that travel from the parallel port to the microcontroller and vice versa. This is essentially everything that can be said about the schema. The two boxheaders (K2 and K3) have the ‘standard’ ISP (in system programming) pinout for the AVR controllers. The manufacturer recommends these two pinouts in an attempt to create a kind of standard for the in-schema programming of AVR-controllers. These connections can be found on many development boards for these controllers. The software carries out the actual programming task.

Circuit diagram :
AVR_Dongle_Circuit_Diagramw
AVR Dongle Circuit Diagram

It is therefore necessary to have a program (ATMEL AVR ISP), which is available as a free download from http://www.atmel.com. The construction of the schema will have to made on standard prototype board, since we didn’t design a PCB for this schema. This should not present any difficulties considering the small number of parts involved. We recommend that inexperienced builders first make a copy of the schema and cross off each connection on the schematic once it has been made on the board. This makes it easy to check afterwards whether all connections have been made or not.

Sourced by: Streampowers.blogspot.com
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Thursday, August 21, 2014

SP How to Make an AVR Perform Multiple Tasks

This article describes a way to create an AVR perform multiple tasks. Beginners who want to urge an in-depth information in AVR assemble language programming will seek this project. The assembly language helps to utilize all the functions and capabilities of the processor. browse on to grasp a lot of.



The most vital and major functionality of an operating system is performing multiple tasks on the CPU. whats being done here is time sharing multitasking which too on an AVR. An Atmega32 is ready up to perform Round-Robin Multitasking. Quasi-parallel execution of multiple tasks is feasible through Round-Robin Multitasking. The tasks are time-sliced and dont seem to be tired parallel.

The project demonstrates how the switching mechanism is finished between seven individual tasks. The RAM is split between the amount of processes that are running. A timer is employed here and a trigger is executed when it reaches a compare worth. the required registers are pushed onto the stack.

Now comes the method of switching between the varied tasks. A backup of the present stack pointer is needed as this helps to spot the previous task that was being executed. concerning fifty bytes of memory is formed offered to store the task index. this is often the stack pointer backup table.

Now suppose, task one is interrupted by the timer, the CPU registers and also the standing registers are pushed. The task index is checked at this time and also the stack pointer of future task is currently obtained. currently this task starts executing and this continues for a number of microseconds till its interrupted. This cycle continues and this provides an effect that every one tasks are being performed parallely.
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