Wiring And Schematic

Using LT3582-12 dual channel DC DC converter integrated circuit, manufactured by Linear Technology, can be designed a very simple step up dc converter. This 5 to 12V c converter electronic project provide both positive and negative outputs required in many biasing applications such as active matrix OLED (organic light-emitting diode)displays as well as CCD (charge coupled device) applications.

The LT3582 offer an I2C interface that can dynamically program output voltages, power sequencing and output voltage ramps as the application requires. The LT3582’s positive output voltage can be set between 3.2V and 12.775 in 25mV steps, whereas the negative output can be set between -1.2V and -13.95V in 50mV steps. The LT3582-12 is preconfigured with ±12V output, requiring no future programming.

This project converts 12v DC to a regulated 5v DC at up to 1.8 amps, suitable for driving a tablet computer from a 12v car battery in a power blackout etc.

The schema for this buck converter is nothing original, basically it is the schema from the 34063 IC datasheet, and all I did was to use an external PFET instead of the external PNP transistor shown in the datasheet. The external PFET allows currents up to a few amps at good efficiency, however I have used hard current limiting at 1.8A for safety and good performance in this prototype.

Energy conversion efficiency is very high due mainly to the choice of external components used with the cheap 34063 SMPS IC.

 PCB layout.
The prototype was tested in hardware, please excuse the messiness. The layout is far from ideal, I did it this way to allow easy swapping of parts and just to be lazy, to save the effort of making a PCB. However it still works pretty good, and a proper PCB would improve performance a little bit.

PFET choice.
I did not have a lot of PFETs in my parts box so I used a 100v 8A rated part. This was an SMD PFET so I just tacked it on the bottom of the PCB. It is efficient enough to not need a heatsink even at 5v 1.5A continuous output. The PFET I used was not ideal, its "Rds on" value is about 0.3v at 1.5A (0.2 ohms) which is too high and costs efficiency. Going to a 50v >20A PFET with an RDS <0.1 ohms or <0.05 ohms would give a noticable increase in efficiency.

Schottky diode choice.
I used a TO-220 60v dual 10A schottky diode pack (total 20A). This is a no-brainer, although this is overkill these diodes are only $1-$2 and can also be pulled for free from any old PC PSU and most commercial SMPS supplies. Besides the safety of being very large and over-rated, the main benefit is these diodes have a very low forward voltage drop of <0.3v at 1.5A or 2A and this equates to reduced losses (more efficiency).

Inductor choice.
This is just a commercial "3 amp" 24mm total diameter inductor/choke available from hobby suppliers like Altronics Australia. I think it is a 220uH or 330uH value, but sorry I lost the paperwork.  A few other powdered-iron toroid inductors were tried and it is not that critical. It has 51 turns of 1.0mm diameter wire if that helps. The inductor measured 0.32mV at exactly 1A DC, so DC resitance was measured at 32 milliohms.

Schematic and operation.
Sorry for the hand-drawn schematic! As you can see the schema is minimum parts. It uses just two resitors to drive the PFET from the IC (same as the datasheet), this is not ideal but was done to test the concept and see if a PFET can be driven as easily as the PNP transistor normally is. PFET turnon is good at 0.07uS, but turnoff is not great taking 0.8uS. This costs about 1-2% efficiency. The 560 ohm resistor could be reduced to speed up the turnoff, but this would increase losses in that resistor so it is a tradeoff.

34063 SMPS IC.
The 34063 IC does all the clever stuff, mainly it regulates voltage at 1.25v on VFB pin5. Because of the 6k8:2k2 voltage divider on the output, this gives very close to 5v, I actually saw about 5.01v-4.99v Vout in testing, very nice.

Max current limit resistor.
The resistor between Vin and pin7 sets the max inductor current limiting, this was set by me to roughly 0.18 ohms to give 1.8A current limiting. (Imax = 0.32v / R = 0.32v/0.18 = 1.78A). The current limit is best at slightly above the max required current. This gives better safety and also helps stabilise oscillation.

Caps etc.
CT used the datasheet value of 1nF. That gave oscillator value of 26.2kHz measured on pin3 (with no load), however the whole schema usually operated at 29-33kHz because of the way the regulation works in the IC. The filter caps; 680uF on the input and 1000uF on the output were chosen to be "good enough". Output ripple was approx 25-30mV which is fine.

Measured efficiency!

Vin Iin Pin Vout Iout Pout Eff % 
12.5v 670mA 8.375W 4.99 1.53A 7.63W 91.1%
12.5v 430mA 5.375W 5.00 1.00A 5.00W 93.0%
12.5v 210mA 2.625W 5.00 0.50A 2.50W 95.2%

Note! Readings were taken from meters with only 2 decimal point resolution and were not lab grade accuracy, so there may be a couple of percent error in readings.

Calculating efficiency (at 1.5A output).
The static power losses were seen on the scope and can be calculated;

PFET Rds on period loss = 0.3v / 12.5v = 2.4% loss

DIODE Vf off period loss = 0.28v * 1.53A * 0.56 offduty = 240mW = 2.8% loss

Inductor resistance loss = 1.53A squared * 0.032 ohms = 75mW = 0.9% loss

560 ohm resistor loss = 10.5v squared / 560 * 44% onduty = 87mW = 1.0% loss

Total static losses at 1.53A output = 7.1%
Calculated other (switching) losses = 100% - 91.1% - 7.1% = 1.8%



Scope current L1 inductor (on period) at 5v 1.5 amps.
Above is the on period current through the PFET and L1 inductor. As it is a PFET this is inverted so the pointy bit at the bottom is the max current, the top is zero current. At 1.5A and 32kHz the SMPS is very stable, as switching period is reduced becuase the peaks just hit the 0.32v max current limit set by my choice of 0.18 ohm resistor. (However voltage regulation is still the main regulation).

Duty cycle is about 44%, and current ripple in the inductor is nice and low with inductor current averaging 1.5A (ripple of 0.56A, between 1.22A and 1.78A). The noise spikes I suspect are from from my messy PCB with power and load wires everywhere and scope leads laying around next to the PCB and wiring.

Scope current L1 inductor at 5v 1.0 amps.
Same thing but at 1A. Frequency dropped a bit, closer to the 34063 oscillator freq of 26.2kHz, but still (just) triggering on the max current peaks. Current ripple now larger from approx 0.5A to 1.6A (average output 1A). Timing is still 20uS/hdiv but says 40uS on the Lcd as I had zoomed my h-axis (sorry).



Scope current L1 inductor at 5v 0.5 amps.
Here the L1 current has gone "discontinuous" meaning the L1 current is reduced to zero during the end of the off period, and has to start from 0 amps again during every on period. Typical of the regulation system used in a 34063 IC, the timing will "stutter" as needed to maintain Vout regulation at a steady 5.0v. This does not matter and the 34063 can be quite energy efficiency when "stuttering" in discontinuous mode like this. At less than 0.5 amps the stuttering can become very erratic looking, but this is all normal.



PFET drain/source voltage (main switching waveform).
(The PFET on period is the top of the waveform). Above you can see the PFET turnon (through a 10 ohm resistor) is nice and fast, It was about 0.07uS turnon time. However the turnoff is poor, because the turnoff is from a 560 ohm resistor and is slow at 0.8uS. This costs significant efficiency.

Using an external digital driver (like a 12v CMOS digital buffer/inverter chip?) to drive the PFET would improve turnoff time a lot and increase efficiency, but this was a test of using the simple datasheet example schema with an external PFET (instead of the suggested external PNP) and as proof of concept it still works well enough.



5v DC output showing voltage ripple.
Because it is a switching regulator there will always be some ripple on the DC output voltage. This is shown when running at 5v 1.5A and the ripple is typical and acceptable enough at 30-35mV.

Improving efficiency.
This schema was thrown together very quickly to show how to use a cheap common 34063 IC to get a high efficiency supply from 12v->5v DC at 0-1.5A or so. If you want to invest some effort it can be improved further;

1. My PFET is not a good choice, using a better PFET will give an easy 1% more efficiency, and would be the first choice.

2. The inductor is just an ordinary "off the shelf" type. A properly selected inductor or a good core hand wound for best performance could allow lower operating frequency and less current ripple, and maybe less DC ohms, and maybe pick up another 0.5% efficiency or so. (For lower operating freq CT should also be increased to 1.2nF or 1.5nF etc).

3. The PFET turnoff is too slow. Adding a cheap digital buffer IC could pick up 0.8-1.2% efficiency there from reduced switching losses and reduced loss from the 560 ohm resistor.

4. My PCB has very thin long tracks. Using a well designed PCB with thick short tracks for the main current paths might save 30 milliohms and give maybe 0.5% or more efficiency.

Bill of materials.
* 34063 SMPS 8pin IC (Fairchild/ON Semi/AIS etc, ie MC34063A or NCV34063A).
* 8pin IC socket (optional).
* PFET, rated more than double the input voltage and a few times the desired output current, preferably well under 0.1 ohm Rds on.
* Inductor L1 is a powdered iron toroid of 20-30 mm diameter, with thick wire >1.0mm preferred, 3A rated for a 1.5A capable supply. Value in the 150-470uH range, you may need to try a couple of different types. Ideally current ripple will be <50% at full output current.
* Schottky TO-220 dual 10A or dual 16A diode pack. Choose for low forward voltage, most brands are very good, parts can be found in any old PC PSU.
* 470-1000uF 35v electro cap.
* 1000uF 16-25v electro cap (25v will be larger and generally have a longer life).
* CT 1nF 25-50v ceramic or greencap.
* some 1/4W resistors; 560 ohm, 10 ohm, 6k8, 2k2.
* If you need a test load then a large 10W 4.7 ohm resistor will do.

Modifying the schema for 12v car operation.
This schema was designed for a car battery, generally 13.8v to 12.0v when running. If used in a car the schema needs more protection as the Vin might be >15v at times. I would use a 100 ohm resistor instead of the 10 ohm resistor. Also a 13v zener diode across the 560 ohm resistor will add safety for the PFET. A 12v line filter might also be advised, they can be bought from auto stores.

Modifying the schema for 24v operation.
Use 560 ohms instead of 10 ohms, so it now has two 560 ohm resistors. And again a 13v zener from PFET gate to source pin. With a 24v Vin you should use a higher inductor value and larger inductor core, 470uH and up are recommended.

[b]Modifying the schema for high output currents.[b]
The schema is meant for 5v out, 0-1.8A. It will do ok up to 2.5A just by changing the current limit resistor (at 2.5A the resitor should be 0.12 ohms or so).

Currents up to 5 amps or more should be ok, but use a larger inductor core size rated for more than the max amps you need, and again a larger inductor value helps >470uH is good. The diode pack will be fine, but the PFET should be rated for a few times more current than your max current. If needing 5A output I would use a 40-50v 60A TO-220 PFET which are a common size.

Changing output voltage.
Just change the 6k8 resistor, to change the output voltage to something other than 5.0v. Like most SMPS diagram it works best with roughly 2:1 Vin:Vout ratio, if using different ratios then again increasing the inductor value >470uH will help.

Source: http://forum.allaboutdiagram.com/showthread.php?t=7885 

Up to date power supply are renowned as "switching controller power supply." In most swapping supply, the 110 volt AC input is first rectified by two diodes and filtered by a pair of capacitors. This conceives two high- voltage causes; one positive and the other negative. A pair of transistors is then utilized to switch these high voltage supply over the primary winding of a transformer. 

This switching activity is very fast. A usual switching pace is around 40,000 diagram per second or 40KHz. An integrated schema is commonly utilised to control the transistors. This IC not only controls the pace at which the transistors are swapped, but furthermore controls the amount of time that each transistor is energized. The yield voltage of the power supply is very resolute by the "on" time of the transistors. If the transistors are hold on for a longer time span of time, the output voltage of the provide will rise, while shorter times smaller the yield voltage. This is renowned as "pulse-width modulation." 

This is 12V Output To 5V Buck Regulator Circuit Diagram. By adding a flyback winding to a buck-regulator switching converter (see the figure), wliich is essentially a 5-V supply with a 200-mA output capability, a 12-V output ) can be produced. 

The flyback winding on the main inductor (forming transformer Tl) enables an additional low- dropout linear regulator (IC2) to create the 12-V output voltage that`s needed to program EEPROMs.The required input voltage is 8 to 16 V.

This is a schema of Voltage-to-Pulse Duration Converter. This schema is used to convert voltage into pulse duration by combining a timer IC and an OP Amp. Accuracies to better than 1% can be obtained with this schema (a), and the output signals (b) still retain the original frequency, independent of the input voltage. 

Inductorless 3-to-5 Volts Converter Circuit Diagram. By configuring a comparator and a transistor to control the oscillator in a charge pump schema, you enable the pump to generate a regulated output of in principle any desired value. Charge pump ICs can either invert or double an input voltage (for example, 3 V to –3 V or 3 V to 6 V). The charge pump itself does not regulate the output voltage and one running off 3 V is not normally capable of generating intermediate output voltage levels like 5 V. However, by adding a comparator and a reference device, you can create arbitrary output levels like 5 V and regulate them as well.

Charge pump IC1 (a MAX660) has an internal oscillator whose 45 kHz operation transfers charge from C1 to C2, causing the regulated output to rise.

When the feedback voltage (pin 3 of IC2) exceeds 1.18 V, the output of comparator IC2 (a MAX921) goes high, turning off the oscillator via T1. The comparator hysteresis (easily added on IC2) is zero here simply because no hysteresis is required in the control loop. The oscillator when enabled generates two cycles, which is sufficient to drive VOUT slightly above the desired level. Next, the feedback turns the oscillator off again.

The resulting output ripple will depend mainly on the input voltage and the output load current. Output ripple may be reduced at the expense of schema efficiency by adding a small resistor (say, 1 ?) in series with C1. You’ll find that ripple also depends on the value and ESR associated with C1 - smaller values of C1 transfer less charge to C2, producing smaller jumps in V OUT.

Author: D. Prabakaran

This article describes a way to create an AVR perform multiple tasks. Beginners who want to urge an in-depth information in AVR assemble language programming will seek this project. The assembly language helps to utilize all the functions and capabilities of the processor. browse on to grasp a lot of.

The most vital and major functionality of an operating system is performing multiple tasks on the CPU. whats being done here is time sharing multitasking which too on an AVR. An Atmega32 is ready up to perform Round-Robin Multitasking. Quasi-parallel execution of multiple tasks is feasible through Round-Robin Multitasking. The tasks are time-sliced and dont seem to be tired parallel.

The project demonstrates how the switching mechanism is finished between seven individual tasks. The RAM is split between the amount of processes that are running. A timer is employed here and a trigger is executed when it reaches a compare worth. the required registers are pushed onto the stack.

Now comes the method of switching between the varied tasks. A backup of the present stack pointer is needed as this helps to spot the previous task that was being executed. concerning fifty bytes of memory is formed offered to store the task index. this is often the stack pointer backup table.

Now suppose, task one is interrupted by the timer, the CPU registers and also the standing registers are pushed. The task index is checked at this time and also the stack pointer of future task is currently obtained. currently this task starts executing and this continues for a number of microseconds till its interrupted. This cycle continues and this provides an effect that every one tasks are being performed parallely.

this is the simple Period To Voltage Converter Circuit Diagram. The input signal drives ICD. Because ICD`s positive input (V+) is slightly offset to + 0.1 V, its steady state output will be around +13 V. This voltage is sent to ICC through D2, setting ICC`s output to +13 V. Therefore, point D is cut off by Dl, and CI is charged by the current source. 

Assuming the initial voltage on CI is zero, the maximum voltage (^Cinax) is given by: When the input goes from low to high, a narrow positive pulse is generated at point A. This pulse becomes -13 V at point B, which cuts off D2. ICC`s V+ voltage becomes zero. 

The charge on CI will be absorbed by ICC on in a short time. The time constant of C2 and R5 determines the discharge period— about 10 /is. ICB is a buffer whose gain is equal to (R& + R9)~Rg = lM5. ICD`s average voltage will be (1362f 1.545) + 2 = 1052/. RIO and C3 smooth the sawtooth waveform to a dc output.